| Item type |
学術雑誌論文 / Journal Article(1) |
| 公開日 |
2025-06-10 |
| タイトル |
|
|
タイトル |
Distributed Processing Network Design Scheme for Virtual Application Processing Platform |
|
言語 |
en |
| 言語 |
|
|
言語 |
eng |
| 資源タイプ |
|
|
資源タイプ |
journal article |
| アクセス権 |
|
|
アクセス権 |
open access |
|
アクセス権URI |
http://purl.org/coar/access_right/c_abf2 |
| 著者 |
Kawabata, Akio
Hiragi, Sanetora
Bijoy Chand Chatterjee
Oki, Eiji
川端, 明生
平木, 志虎
大木, 英司
|
| 抄録 |
|
|
内容記述タイプ |
Abstract |
|
内容記述 |
Delay-sensitive applications have been provided through a low-delay network utilizing multiple edge clouds. For applications that involve sharing status among multiple users, it is crucial to prevent longer communication delays for users who are farther from the application server compared to those who are closer. To address this issue, this paper proposes a distributed processing network design scheme for virtual processing platforms using low-delay networks and widely distributed servers. The proposed scheme introduces Tapl as a given parameter for correcting events in occurrence order. Events within Tapl delay are sorted in occurrence order. The proposed scheme can change its operation mode from a conservative synchronization to an optimistic synchronization depending on the setting of Tapl. The proposed scheme is formulated as a mixed-integer linear programming problem to determine users’ and servers’ distributed processing network configuration. We evaluate the proposed scheme on two different network topologies. Numerical results indicate that, depending on the setting of Tapl, the proposed scheme can reduce the maximum amount of memory used for rollback processes in optimistic synchronization-based applications or realize a conservative synchronization algorithm. The computation time under the condition of 1000 users is within a maximum of nine sec, an acceptable amount of time for preparation before starting a planned service. These results indicate that the proposed scheme realizes event order correction with excellent delay characteristics and applies to virtual processing platforms. |
|
言語 |
en |
| 書誌情報 |
en : IEEE Transactions on Network and Service Management
巻 22,
号 4,
p. 3632-3645
|
| 出版者 |
|
|
出版者 |
IEEE |
|
言語 |
en |
| ISSN |
|
|
収録物識別子タイプ |
EISSN |
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収録物識別子 |
1932-4537 |
| DOI |
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|
関連タイプ |
isVersionOf |
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|
識別子タイプ |
DOI |
|
|
関連識別子 |
10.1109/TNSM.2025.3562208 |
| 権利 |
|
|
権利情報 |
© 2025 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works |
| 関連サイト |
|
|
|
関連識別子 |
https://ieeexplore.ieee.org/document/10970089 |
|
|
言語 |
en |
|
|
関連名称 |
IEEE Xplore |
| 著者版フラグ |
|
|
出版タイプ |
AM |
| キーワード |
|
|
主題 |
Delay sensitive service |
| キーワード |
|
|
主題 |
distributed processing |
| キーワード |
|
|
主題 |
middleware |
| キーワード |
|
|
主題 |
optimistic synchronization |
| キーワード |
|
|
主題 |
conservative synchronization |
i19324537-0022-3632.pdf (1.1 MB)
